Public Lab Research note


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Potentiostat Notes-3; WheeStat 5.1 Fabrication

by JSummers |

What I want to do

This research note follows up on two earlier notes and describes how we make the 3.3 volt version of our potentiostat, the WheeStat 5.1. Notes on the history of the project and on the software are at http://publiclab.org/notes/JSummers/11-02-2013/potentiostat-notes-1-wheestat-history and http://publiclab.org/notes/JSummers/12-20-2013/potentiostat-software, respectively. As documented in our first note, we had problems accessing the full dynamic range in our earlier 3.3 volt potentiostat. The design described in this note performs well over the dynamic range of interest. Barring unforeseen events, I expect we will use the 3.3 volt design described in this note for some time with only minor modifications. Note that the design is slightly different than the 5 volt design described in the first research note. A schematic for the 3.3 volt design can be found at our GitHub site in the same folder with the pdf files used to develop and assemble the board.

My attempt and results

In this note, I will spend a fair amount of time describing how we fabricate and test a printed circuit board.* If you are already confidant in your fabrication skills, drop down to below the third figure where I begin describing how we test the digital potentiometers. There are a lot of resources on the internet that describe pcb fabrication. I believe that I learned what I know from a Sparkfun tutorial. It is all pretty straight forward, but I recommend reading up and watching videos. When you see the figures, it will be fairly apparent that I am not the guy to offer advice on soldering surface mount components. First, I recommend you print out three pdf files that are available on our GitHub site (https://github.com/SmokyMountainScientific/WheeStat5_0/tree/master/WheeStat5_1Board). These files show the top traces, bottom traces, and assembly diagram. The first file is a 1:1 scale figure that you will use as a mask for the photo-lithography process. Print out this file and measure to make sure the header pins are on 0.1" centers (1.8 inches between left and right holes, 1.0 inches between top and bottom). Once you are happy that the scale is OK, transfer the image onto an overhead transparency (print a new one or photocopy it onto the transparancy). Cut the image from the transparency and tape it to the inside glass of a picture frame. Cut a piece of two-sided photo-sensitized pcb board to be a little larger than the image.
Here is something a little different; We use photolithography to produce the traces on the top side of the board (as most people would) but then draw the traces on by hand on the bottom side. This way we don't have to get two images to line up perfectly. Anyway, before photo-developing the top, I recommend removing the protective film from the bottom and taking the photosensitive polymer off with acetone. Only do this to the bottom. Then remove the protective film from the top, affix it to the inside glass of the picture frame, expose the image to light, and develop the image using NaOH solution (developer). This should give you something that looks like the figure below on the top face and blank copper on the bottom face of the board.

DSCN0338.JPG

At this point, drill holes for your wire connections, headers, and vias (connections between top and bottom traces). I think we use 0.035" bits that we buy from T-Tech. A pack of 10 costs $50. I recommend using a drill press since the bits are easily broken. Once you have the holes in, it is a simple matter to connect the dots on the bottom with a sharpie type permanent marker, following the pattern shown in the second pdf (shown below). DSCN0343.JPG The marker lines will serve as a mask for etching the bottom of the board.
Etch the board using commercially available etching solution (FeCl3) in warm water. Connect the copper trances from the top and bottom faces by pushing bare wires through the via holes and soldering them to the copper traces. When soldering the female headers to the pcb, I hold everything square by assembling everything on the male headers of the LaunchPad. At this point, the assembly will look like the main image at the top of this research note (note that in this figure, the pcb is rotated 180 degrees from its intended orientation on the LaunchPad. Before the board is tested, it will need to be re-oriented). Soldering surface mount components is a craft that takes some practice to do well. Since I suck at this, I use the largest components I can find (1206 package for resistors, caps, etc and SOIC integrated circuits). With the exception of the potentiometer and amp, all component values (kilo-ohms, microfarads, microhenrys) are provided on the schematic from the GitHub site. The MCP 4231 dual digital potentiometer and MCP 6004 rail to rail quad op amp are both 14-SOIC packages. To keep the IC in place while soldering the first connections, I hold it down with a little tape (We use paper backed tape so it will not melt to the board). Make sure the IC is correctly aligned before soldering more than two connections. The IC in the photo below is the potentiometer. It should be installed with the little circular dimple down and to the right (relative to the orientation in the pdf assembly diagram). The dimple on the amp goes up and to the left.

digipotAttach.jpg

I strongly recommend performing quality control checks on the board while you are fabricating it. Checking continuity across copper traces, for example, can be done immediately after etching the board. After I have the inducters, capacitors, resistors, and the digital potentiometer in place, I test the board to make sure that the potentiometer responds to commands before soldering on the quad op amp. To test the connections to the digital pot, I set up a temporarily circuit by soldering a jumper wire (red in the photo below) and a 20 k ohm resistor to the board to form a voltage divide between VCC and GND. The temporary circuit has the two potentiometer circuits on one side of the voltage divide and the 20 k ohm resistor on the other. By monitoring the voltage between the two halves of the circuit, we can determine whether the potentiometers are responding to commands. To form the temporary circuit, solder one end of a jumper wire to VCC and the other to the trace containing the working electrode hole (WE). The resistor is then attached at three points, simultaneously forming the circuit and allowing the potential at the voltage divide to be read at the Iread pin; One wire from the 20 k ohm resistor is shorted across the left pad of R6 and the Iread trace. The other wire from the resistor is soldered to Ground. The figure below shows the resistor and the red jumper wire attached to the board.

testingPot.jpg

With the test circuit set up, I upload and run an Energia sketch called DigitalPotCheck (found on our GitHub site, inside the same folder where you got the pdf files). This sketch increments the wiper settings on the two potentiometers, reads the voltage on the Iread pin and outputs the measurement to the serial monitor. Copying the readout from the serial monitor to an XL sheet will allow you to check whether the pots are working. The first time I ran this particular board, the output was a flat line: There was no resistance change at the potentiometers. It turns out that I had a break in the continuity of one of the copper traces on the bottom of the board. Since the amps were not yet soldered on, it was fairly straightforward to troubleshoot, find and fix the problem. Once I had that fixed, the output from the test sketch gave the expected fluctuating values (left graph below) and the predicted and observed outputs lined up nicely (right graph). digPotChk.png

Once the pot is functioning properly, remove the test circuit (jumper wire and resistor), solder on the amps and the wire leads for the electrodes.
Oh yeah, and don't forget to put electrical tape across the bottom of the board so it does not short out across the unused LaunchPad header pins.
To test the performance of the potentiostat, we used it to recorded voltammagrams of potassium ferricyanide (K3FeCN6) at concentrations of 10, 2, 0.4, and 0.08 mM (five fold serial dilutions). All experiments were performed in 0.05 M KCl, .010 M NaOH, at a carbon working electrode, with platinum counter electrode, and silver/silver chloride reference electrode. The photo below shows the physical setup.

WheeStat-VoltammetryPhoto.jpg

The cyclic voltammagram (CV) of the 10 mM ferricyanide, showed the characteristic duck shape expected with no obvious anomalous features (Note: While we were able to record some very nice looking voltammagrams with the instrument, these were omitted from the note in favor of presenting figures that show the instrument's limitations). At 2 mM, the voltammagram begins looking a little ragged (as shown in the figure below). 2mMFeCN6.png

While the 2 mM CV looked a little noisy, the differential pulse voltammagram (DPV) gave better looking data. Since this was the case, we looked at sequentially lower concentrations using the DPV experiment. After two five fold dilutions (resulting in a 80 micromolar solution), significant noise was observed. The figure below shows a series of ten differential pulse voltammagrams on the 80 micromolar sample. 100uMdpv.png

If you look at the voltammetry data above, you will notice that there appears to be essentially two groups of data points. While most of the points form a peak with noise randomly dispersed about it, there is a parallel set of data tracking ~50 mV below the expected y-axis value. This does not appear to be random noise and my guess is that it is software related. Since these points are consistently 50 mV low and appear periodically as the voltammagrams are collected, I suspect the problem is timing related.

Questions and next steps

in terms of the next steps, 1) clearly I have to address the issue with the systematic noise.** 2) In terms of hardware, I would like to see if we could get better signal amplification using a 50 k ohm digital pot, rather than the 10 k ohm pot used in this board. Still, the data look pretty good for the first run through and the signal to noise is clearly sufficient for an undergraduate teaching demo / experiment. Guess I shouldn't complain. 3) I still have some software bugs to squish. For example, there is a routine for the data logging experiment where the potentiostat searches for the open circuit potential between readings. This routine has a minor bug in it. Also, I want to have the instrument go to the open circuit voltage after it finishes any experiment. That should be incorporated into the software. 4) Excel has an issue opening the tab delimited files that the program outputs when you click the "save file" button. I want to change the code to output comma separated value (CSV) files. Perhaps that will be easier for Excel to accept. 5) I still need to make sure all the resistor and capacitor values on the schematic are correct. 6) I need to put my SPI library on our GitHub site and write up some "Read Me" files to make it easier for people to find things. 6) I need to write up our hydrogen sulfide monitoring experiments. 7) I need to learn to get photographs in focus. Unfortunately, the spring semester is about to start and it might be a while before I have the necessary time to devote to these tasks. If you decide to make one of these, please let me know about any problems you encounter. -Jack

NOTES ADDED IN ADDENDUM: *Professionally fabricated boards can be purchased from OSH Park at this point. To order, follow the link to shared projects and look for the WheeStat5.1, which was made available on Jan 8, 2014. **Point 1: Systematic noise has been addressed here, although I am not entirely convinced that all the timing bugs have been worked out.



potentiostat wheestat

7 Comments

Great! I think the hydrogen sulfide analysis with photo paper is unfortunately a dead end endeavour and this approach is quite reasonable.


Dear Dr. Jack, I get this error whenever I run your DigitalPotCheck:

{ sketch_mar15a.ino: In function 'void digitalPotWrite(int, int)': sketch_mar15a.ino:87:7: error: 'class SPIClass' has no member named 'trans2ByteA' sketch_mar15a.ino:88:7: error: 'class SPIClass' has no member named 'trans2ByteB' }

I already have the altSPI library in my energia library folder.What do I have to do?

Thanks!


Hi Kloots, I think you are working with a really old the sketch. At one point the code assumed that the trans2ByteA and trans2ByteB were added to the SPI libarary. More recent versions use the altSPI library instead of the SPI library. I think you should be able to fix this just by changing all the SPI.command() lines in the code to altSPI.command(). For example, altSPI.setModule(0); altSPI.begin(); altSPI.setClockDivider(SPI_CLOCK_DIV64);
Of course, I think the best thing to do is to get the most recent versions of the sketches off the GitHub site. Let me know if that doesnt fix the problem. Jack


Dear Dr. Jack:

Thank you so much!! It is now working!

Regards, Kloots


Hello Dr.jack I want to build this device but I didn't know Which Launchpad did you use in version 5.1? MSP430g or EK-TM4C123GXL


Hi @momosavar, it uses the ek-tm4c123gxl. The voltage range of the model 5 potentiostat is limited to +/- 1.65 volts. The newer model 7 will go to +/- 5 volts. We have been working on a newer model (7.2) that will have a larger current range and be able to switch voltages faster. I hope that we will be able to finish prototyping the 7.2 in the next couple of weeks. The printed circuit boards for the model 5 and 7 can be ordered pretty cheaply from OSHPark.com (https://oshpark.com/shared_projects/yepeXPFo and https://oshpark.com/shared_projects/ESaBVpCE). Once I finish prototyping the 7.2, I will make that circuit board available as well.
Let me know if you have trouble finding any of the documentation or files. Best regards, Jack


Thank you so much @JSummers If there is a problem, I will certainly let you know.


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